The field of portable electronics and smart devices has seen a significant shift towards multi-valued logic (MVL), especially ternary logic, due to its potential to reduce circuit complexity and power consumption. This paper shows how Carbon Nanotubes FETs (CNTFETs) can be used in the design of ternary logic gates, which is a promising alternative to the conventional binary logic design. In particular we propose a procedure to design some CNTFET-based logic gates, all in ternary logic. The main novelty is that in this paper all simulations are performed in Verilog-A, avoiding so the problems presented in SPICE. The obtained results are encouraging and demonstrate that CNTFET-based ternary logic gates can be a viable approach for the design of low-power, high-speed circuits.
Perri,A. G. and Marani,R. (2025). Design and Simulation of Ternary Logic Circuits Using CNTFETs. International Journal of Nanoscience and Nanotechnology, 21(1), 21-29. doi: 10.22034/ijnn.2025.2045570.2601
MLA
Perri,A. G. , and Marani,R. . "Design and Simulation of Ternary Logic Circuits Using CNTFETs", International Journal of Nanoscience and Nanotechnology, 21, 1, 2025, 21-29. doi: 10.22034/ijnn.2025.2045570.2601
HARVARD
Perri A. G., Marani R. (2025). 'Design and Simulation of Ternary Logic Circuits Using CNTFETs', International Journal of Nanoscience and Nanotechnology, 21(1), pp. 21-29. doi: 10.22034/ijnn.2025.2045570.2601
CHICAGO
A. G. Perri and R. Marani, "Design and Simulation of Ternary Logic Circuits Using CNTFETs," International Journal of Nanoscience and Nanotechnology, 21 1 (2025): 21-29, doi: 10.22034/ijnn.2025.2045570.2601
VANCOUVER
Perri A. G., Marani R. Design and Simulation of Ternary Logic Circuits Using CNTFETs. International Journal of Nanoscience and Nanotechnology, 2025; 21(1): 21-29. doi: 10.22034/ijnn.2025.2045570.2601
