Iranian Nanotechnology Society International Journal of Nanoscience and Nanotechnology 1735-7004 21 1 2025 03 23 Design and Simulation of Ternary Logic Circuits Using CNTFETs 21 29 733181 10.22034/ijnn.2025.2045570.2601 EN Anna Gina Perri Department of Electrical and Information Engineering Polytechnic University of Bari Via E. Orabona, 4, 70125 Bari, Italy 0000-0003-4949-987X Roberto Marani Institute of Intelligent Industrial Technologies and Systems for Advanced Manufacturing (STIIMA), National Research Council of Italy Journal Article 2024 11 11 The field of portable electronics and smart devices has seen a significant shift towards multi-valued logic (MVL), especially ternary logic, due to its potential to reduce circuit complexity and power consumption. This paper shows how Carbon Nanotubes FETs (CNTFETs) can be used in the design of ternary logic gates, which is a promising alternative to the conventional binary logic design. In particular we propose a procedure to design some CNTFET-based logic gates, all in ternary logic. The main novelty is that in this paper all simulations are performed in Verilog-A, avoiding so the problems presented in SPICE. The obtained results are encouraging and demonstrate that CNTFET-based ternary logic gates can be a viable approach for the design of low-power, high-speed circuits. https://www.ijnnonline.net/article_733181_7209460c6fbadacfeea3a80a992d6182.pdf