Iranian Nanotechnology Society International Journal of Nanoscience and Nanotechnology 1735-7004 19 1 2023 03 01 A Technique, Based on Thevenin Equivalent Method, to Study the Noise Performance of Analog Circuits Involving both CNTFET and MOS Devices 9 19 702272 10.22034/ijnn.2023.1988468.2327 EN Roberto Marani Institute of Intelligent Industrial Technologies and Systems for Advanced Manufacturing (STIIMA), National Research Council of Italy, 70125, Bari, Italy 0000-0002-5599-903X Anna Gina Perri Electronic Devices Laboratory, Department of Electrical and Information Engineering, Polytechnic University of Bari, 70126, Bari, Italy 0000-0003-4949-987X Journal Article 2023 01 26 This paper presents a procedure, based on Thevenin equivalent method, to analyse the noise effects in analog circuits based on CNTFET and MOS devices. To achieve this goal, we use a semi-empirical compact CNTFET model, already proposed by us, including noise source contributions, and the BSIM4 model for MOS device. After a brief review of these models, as example of analog circuit, the proposed procedure is applied to study a basic current mirror and the simulation results allow to determine easily the different noise contribution of every single source. The software used is Advanced Design System (ADS) which is compatible with the Verilog-A programming language.

https://www.ijnnonline.net/article_702272_98e0eae4546fd0a5cb5c2238384fd043.pdf